r07ds1332ej0100 rev.1.00 page 1 of 7 mar 28, 2016 data sheet np30n06qdk 60 v ? 30 a ? dual n-channel power mos fet application: automotive description np29n06qdk is a dual n-channel mos field effect transistor designed for high current switching applications. features ? super low on-state resistance ? r ds(on)1 = 14 m max. (v gs = 10 v, i d = 15 a) ? r ds(on)2 = 21 m max. (v gs = 4.5 v, i d = 7.5 a) ? low c iss : c iss = 1500 pf typ. (v ds = 25 v) ? designed for automotive application and aec-q101 qualified ? small size package 8-pin hson dual outline source 1 body diode body diode gate 1 drain 1 source 2 gate 2 drain 2 8-pin hson dual equivalent circuit remark: strong electric field, when exposed to this device, can cause destructi on of the gate oxide and ultimately degrade the device operation. steps must be taken to stop generation of static electricity as much as possible, and quickly diss ipate it once, when it has occurred. ordering information part no. lead plating packing package NP30N06QDK-E1-AY * 1 pure sn (tin) tape 2500 p/reel taping (e1 type) 8-pin hson dual np30n06qdk-e2-ay * 1 taping (e2 type) note: * 1. pb-free (this product does not cont ain pb in the external electrode) r07ds1332ej0100 rev.1.00 mar 28, 2016
np30n06qdk r07ds1332ej0100 rev.1.00 page 2 of 7 mar 28, 2016 absolute maximum ratings (t a = 25c) item symbol ratings unit drain to source voltage (v gs = 0 v) v dss 60 v gate to source voltage (v ds = 0 v) v gss 20 v drain current (dc) (t c = 25 c) ? ? 1, 4 i d(pulse) 120 a total power dissipation (t c = 25 c) ? 4 p t1 59 w total power dissipation (t a = 25 c) ? 2, 4 p t2 1.0 w channel temperature t ch 175 c storage temperature t stg ? 55 to + 175 c repetitive avalanche current ? ? 3 e ar 35 mj thermal resistance channel to case thermal resistance r th(ch-c) 2.54 c/w channel to ambient thermal resistance ? 2 r th(ch-a) 150 c/w notes: * 1. t c = 25c, pw 10 s, duty cycle 1% * 2. mounted on glass epoxy substrate of 40 mm 40 mm 1.6 mmt with 4% copper area (35 m) * 3. r g = 25 , v gs = 20 v 0 v * 4. one channel operation
np30n06qdk r07ds1332ej0100 rev.1.00 page 3 of 7 mar 28, 2016 electrical characteristics (t a = 25c) item symbol min typ max unit test conditions zero gate voltage drain current i dss 1 a v ds = 60 v, v gs = 0 v gate leakage current i gss 100 na v gs = 20 v, v ds = 0 v gate to source threshold voltage v gs(th) 1.5 2.1 2.5 v v ds = v gs , i d = 250 a forward transfer admittance ? ? 1 r ds(on)1 11.5 14 m v gs = 10 v, i d = 15 a r ds(on)2 16.5 21 m v gs = 4.5 v, i d = 7.5 a input capacitance c iss 1500 2250 pf v ds = 25 v, v gs = 0 v, f = 1 mhz output capacitance c oss 160 240 pf reverse transfer capacitance c rss 50 90 pf turn-on delay time t d(on) 15 30 ns v dd = 30 v, i d = 15 a, v gs = 10 v, r g = 0 rise time t r 5 13 ns turn-off delay time t d(off) 50 100 ns fall time t f 3 8 ns total gate charge q g 25 38 nc v dd = 48 v, v gs = 10 v, i d = 30 a gate to source charge q gs 5 nc gate to drain charge q gd 4 nc body diode forward voltage ? s reverse recovery charge q rr 26 nc note: * 1. pulsed test test circuit 3 gate charge v gs = 20 0 v pg. r g = 25 50 d.u.t. l v dd test circuit 1 avalanche capability pg. d.u.t. r l v dd test circuit 2 switching time r g pg. i g = 2 ma 50 d.u.t. r l v dd i d v dd i as v ds bv dss starting t ch v gs 0 duty cycle 1% = 1 s v gs wave form v ds wave form v gs v ds 10% 0 0 90% 90% 90% v gs v ds t on t off t d(on) t r t d(off) t f 10% 10%
np30n06qdk r07ds1332ej0100 rev.1.00 page 4 of 7 mar 28, 2016 typical characteristics (t a = 25c) derating factor of forward bias safe operating area total power dissipation vs. case temperature dt - percentage of rated power - % 0 20 40 60 80 100 120 0 50 100 150 200 t c - case temperature - c p t ? total power dissipation - w 0 10 20 30 40 50 60 70 0 50 100 150 200 t c - case temperature - c forward bias safe operating area i d - drain current - a 0.01 0.1 1 10 100 1000 0.1 1 10 100 t c =25 single pulse i d(pulse) =120a i d(dc) =30a power dissipation limited secondary breakdown limited v ds - drain to source voltage ? v transient thermal resistance vs. pulse width r th(t) - transient thermal resistance - c/w 0.01 0.1 1 10 100 1000 r th(ch-a) = 150c/w r th(ch-c) = 2.54c/w one channel operation single pulse mounted on glass epoxy substrate of 40 mm x 40 mm x 1.6 mmt with 4% copper area(35 m) pw - pulse width - s 100 1 m 10 m 100 m 1 10 100 1000
np30n06qdk r07ds1332ej0100 rev.1.00 page 5 of 7 mar 28, 2016 drain current vs. drain to source voltage forward transfer characteristics i d - drain current - a 0 20 40 60 80 100 120 140 00.511.522.53 pulsed v gs =10v v ds - drain to source voltage - v i d - drain current - a 0.001 0.01 0.1 1 10 100 012345 v ds = 10v pulsed t a =175c 125c 75c 25c -55c v gs - gate to source voltage - v gate to source threshold voltage vs. channel temperature forward transfer admittance vs. drain current v gs(th) ? gate to source threshold voltage - v 0 1 2 3 4 -100 -50 0 50 100 150 200 v ds = v gs i d =250 a t ch - channel temperature - c | y fs | - forward transfer admittance - s 1 10 100 0.1 1 10 100 v ds = 5v pulsed t a =175c 150c 75c 25c -55c i d - drain current - a drain to source on-state resistance vs. drain current drain to source on-state resistance vs. gate to source voltage r ds(on) - drain to source on-state resistance - m 0 10 20 30 0.1 1 10 100 pulsed v gs =10v i d - drain current - a r ds(on) - drain to source on-state resistance - m 0 10 20 30 0 5 10 15 20 pulsed i d =15a i d =6a 15a 30a v gs - gate to source voltage - v
np30n06qdk r07ds1332ej0100 rev.1.00 page 6 of 7 mar 28, 2016 drain to source on-state resistance vs. channel temperature capacitance vs. drain to source voltage r ds(on) - drain to source on-state resistance - m 0 10 20 30 -100 -50 0 50 100 150 200 pulsed v gs =10v i d =15a t ch - channel temperature - c c iss , c oss , c rss - capacitance - pf tf ad i s 10 100 1000 10000 0.01 0.1 1 10 100 v gs = 0v f = 1.0mhz c rss c iss c oss v ds - drain to source voltage - v switching characteristics dynamic input characteristics td(on),tr,td(off),tr ? switching time - ns 1 10 100 1000 0.1 1 10 100 v dd = 30v v gs =10v r g =0 ? t d ( on ) t r t d(o ff ) t f i d - drain current - a v ds - drain to source voltage - v 0 2 4 6 8 10 0 10 20 30 40 50 0 5 10 15 20 25 v dd = 48v 30v 12v i d =30a v ds v gs q g - gate charge - nc vgs - gate to source voltage - v source to drain diode forward voltage reverse recovery time vs. drain current i f - diode forward current - a 0.1 1 10 100 0 0.2 0.4 0.6 0.8 1 1.2 pulsed v gs =10v v gs =0v v f(s-d) - source to drain voltage - v t rr ? reverse recovery time - ns 1 10 100 0.1 1 10 100 di/dt = 100a/ s v gs = 0v i f - drain current - a
np30n06qdk r07ds1332ej0100 rev.1.00 page 7 of 7 mar 28, 2016 package drawings (unit: mm) 8-pin hson dual (mass: 0.12 g typ.) renesas package code: plsn0008da-a 1: source 1 2: gate 1 7, 8: drain 1 3: source 2 4: gate 2 5, 6: drain 2 a a s
all trademarks and registered trademarks are t he property of their respective owners. c - 1 revision history np30n06qdk data sheet rev. date description page summary 1.00 mar 28, 2016 ? first edition issued
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